Wire is overlapping

Hello,

I have 2 “Wire overlapping” messages when I run DRC.
How could I avoid those errors ?

Here is a screenshot of the zone.
Problem is located on bottom pins of U1 (pins 4 & 5):

Here is my project file:
LM5007.fzz (47.6 KB)

Wali

I could not find anything wrong with it and I could find nothing wrong with the part… The pad spacing is less than 10mil apart. It looks to me like Fz is throwing a false error. Fritzing has a tendency to through errors when traces and pads are close together, we have ran across that when running traces between pins… we just ignore them. When I moved the chip just a little bit it through the errors on the other pads. I would say just go ahead with it… as far as the errors go, I can’t see a problem.

If you move location up to 0.635 or down to 0.639in it clears.

Don’t know if it matters but one pad is 1 px out.

It looks ok, but maybe gerber it to be sure.

Fritzing idiosyncrasies… :confused:

Thank you for your responses.

As has said Old_Grey, I have moved part location down to 0.639, and there is no more errors.

But Steelgoose, you have said: [quote=“steelgoose, post:2, topic:1891”]
I would say just go ahead with it…
[/quote]
Does this means that if I send this file to fab with DRC errors like those, it will be accepted and produced, or have I to look for a solution like the one proposed by Old_Grey before sending the file for fab ?

I would say it is just a Fritzing thing :astonished: I doubt very seriously that there are any real errors… It is just the way Fritzing DRC scans it…