Breadboard design

Hello, I am doing some project with LEDs using ESP32…
I am trying to design a PCB to replace my breadboard with wires, and would kindly ask for some advice on improving the PBC route design.

Here is a screenshot of my design (routes are connected properly to endpoints):

You would be better to post the sketch (the .fzz file, upload is 7th icon from the left in the reply menu.) Pictures are basically useless in trying to do anything. More information would also be required, there don’t appear to be any LEDs here (nor indication of what the headers connect to presumably the LEDS) nor any current limiting resistors nor what pins in the ESP (and what ESP it is!) The board layout as it appears looks fine (as long as DRC passes which it looks like it should.) Your best bet would likely be to include the Fritzing part for the ESP in the sketch so the pin assignments are obvious and specify the the LEDs (such as if they have current limiting resistors in them and how much current they draw as that has a large effect on whether the ESP can drive them.

Peter

Peter

Hi Peter,

although I think the sketch wont provide much more info I have attached it:
for_peter.fzz (17.5 KB)

I didn’t want to discuss about project, I was just asking about routes I made, hoping on some general guidelines to improve them, like for example:

  • don’t do 45deg turns, do 60deg instead
  • don’t put GND on the lower layer
  • put GND and VCC on same layer
  • one should never put GND and VCC on neighboring pins
  • those fan-out patterns look ugly
  • don’t put device name on silkscreen
  • never have route parallel to pins
  • don’t cover routes with text
  • etc…

While I am far from an expert on board design, those with more experience recommend 45 degree angles rather than 90 degree (mostly for rf type interference I think) so your board looks correct according to best practice. I expect in this case either would work though.

Don’t know any reason not to. You could change the ground to the bottom layer then use ground fill to make the entire bottom layer ground (by setting a ground fill seed on one of a ground pins) which would make the board house happy (as it uses less etchant.) Same with 3.3V on the top layer. That also gives you a lower resistance path due to more available copper, but I expect that may not matter here if these are logic level signals rather than high power. Avoiding putting power on the bottom layer may make sense (depending on routing) as that may avoid power shorting to a metal case (assuming you have one) but usually routing is going to be the issue here.

A ground fill or copper fill (as noted above) may fix that, otherwise there really isn’t much choice as the connection needs to be made. If the connection isn’t high current or noise sensitive it shouldn’t matter much.

Don’t see a reason not to (in parts we don’t because to change it you need to modify the part, but in a sketch everything is under your control which is why parts leave you to add it in the sketch if you want the labels!) The clearer the design is documented the better chance it will get wired correctly would be my view. I’d probably add tags for signal, power and ground to the (assumed) LED connectors to make the pins purpose clear without having to follow the traces.

This is certainly true! Parallel paths to the same connection cause ground loops which are to be avoided!

The solder mask will be partially blocking the traces so I don’t see this as being a big issue. Making the connections as clear as possible to anyone looking at the board is my usual criteria. Hope this helps!

Peter

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