NXP PN7462AU Created


#1

This is my first part, so I would appreciate feedback on whether I got it right and how I can improve.PN7462.fzpz (35.2 KB)


#2

Mostly fine, but a few issues (mostly minor) issues:

SAM (pin 46) is missing its terminalId in the schematic svg which means the wire connects in the center of the pin rather than the end as all the rest do. The ground pad on the bottom needs a pin somewhere on the edge of the chip in schematic because it isn’t obvious where ground should connect without a pin and because it is defined as the chip rectangle, then entire part comes up red (which usually indicates a non connected pin which is incorrect in this case). I spent a while looking for a non connected pin til I realized what was happening :slight_smile: . Breadboard in this case isn’t really useful (as no one is likely to actually use this on a breadboard), but typically the SMD chips are shown on an adapter board that breaks out to pins on .1 centers. I think I’d be tempted to just ignore breadboard in this case as not worth the work. In pcb connecting traces to the pads causes DRC (routing->Design Rules Check) to fail, but I suspect that is because the default rules aren’t suitable for a chip with this fine a pitch. Perhaps one of the pcb experts will comment. Other than that the layerIds are missing in breadboard and schematic (you need to select the entire drawing, group it and name the group breadboard and schematic respectively), the only thing I know this breaks is exporting your part as an image, it won’t appear without a correct layerId. In the fzp file the type field should be male rather than pad. As that only affects breadboard it isn’t vital though. In PCB the silkscreen layer should be above copper1, as the select mechanism favors the last group and thus will select on silkscreen over the copper layer which is usually not what you want. As well typically the outline of the package appears on the silkscreen so you know where the component appears on the board. Due to the small pin size that is somewhat difficult on SMD parts though. Hope this helps. Below is the test sketch I used to create and export the gerber files to check that the footprint actually made it out of Fritzing (and to catch the lack of the terminalId on pin 47).

test Sketch.fzz (65.9 KB)

Peter