I set the grid to 0.0125 (IIRC) but the smallest option for trace size that I see is 8mil. I set this, but all the traces remain the same size. This means that traces to two adjacent pins on a SOIC-24 package almost touch–literally, it looks like at best a hairline (literally, .003") is all the spacing between them. To get a planar layout, I need to run traces between the pins. I’m outsourcing the fab, so I don’t have the limits of my mill to contend with. I’m driving some (14 total, arranged 2x7) LEDs, and a trace calculator tells me that I need at least 0.066mil from output pin to LED. For each bank of seven LEDs the 140ma current requires a 1-mil trace, and the Vcc-to-split requires 2.5 mils (Vcc to first LED hot bus, 2.5 mils; the trace that drops from the upper hot bus to the lower hot bus need only be 1 mil). The processor is an SOIC-8 form factor. So how do I reduce the trace width to something smaller than the default size, which is massive? I’d like to get it down to the width of an SOIC pin pad. And I want to set it so that all new manual traces get created at that size.
A searchable online help would be, well, a big help.